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WF512K32-XXX5
HI-RELIABILITY PRODUCT
512Kx32 5V FLASH MODULE, SMD 5962-94612
FEATURES
s Access Times of 60, 70, 90, 120, 150ns s Packaging * 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP (Package 400 (1)) * 68 lead, 40mm, Low Capacitance Hermetic CQFP (Package 501) * 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP (Package 502) * 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U), 3.5mm (0.140") high, (Package 510) * 68 lead, 23.9mm (0.940") Low Profile CQFP (G1U), 3.5mm (0.140") high, (Package 519) s 100,000 Erase/Program Cycles Minimum s Sector Architecture * 8 equal size sectors of 64KBytes each * Any combination of sectors can be concurrently erased. Also supports full chip erase s Organized as 512Kx32 s Commercial, Industrial and Military Temperature Ranges s 5 Volt Programming. 5V 10% Supply. s Low Power CMOS, 6.5mA Standby s Embedded Erase and Program Algorithms s TTL Compatible Inputs and CMOS Outputs s Built-in Decoupling Caps for Low Noise Operation s Page Program Operation and Internal Program Control Time s Weight WF512K32-XG2UX5 - 8 grams typical WF512K32-XH1X5 - 13 grams typical WF512K32-XG4X5 - 20 grams typical WF512K32-XG4TX5 - 20 grams typical WF512K32-XG1UX5 - 5 grams typical
1. Call factory for PGA type (HIP) package options. Note: See Flash Programming Application Note 4M5 for algorithms.
FIG. 1
1 I/O8 I/O9 I/O10 A14 A16 A11 A0 A18 I/O0 I/O1 I/O2 11
PIN CONFIGURATION FOR WF512K32N-XH1X5 TOP VIEW
12 WE2 CS2 GND I/O11 A10 A9 A15 VCC CS1 NC I/O3 22 33 23 I/O15 I/O14 I/O13 I/O12 OE A17 WE1 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 A7 A12 NC A13 A8 I/O16 I/O17 I/O18 44 34 VCC CS4 WE4 I/O27 A4 A5 A6 WE3 CS3 GND I/O19 55 45 I/O31 I/O30 I/O29 I/O28 A1 A2 A3 I/O23 I/O22 I/O21 I/O20
8 8 8 8
PIN DESCRIPTION
56
I/O0-31 A0-18 WE1-4 CS1-4 OE VCC GND NC
Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Not Connected
BLOCK DIAGRAM
W E1 CS1 OE A0-18 512K x 8 512K x 8 W E2 CS2 W E3 CS3 W E4 CS4
512K x 8
512K x 8
66
I/O0-7 I/O8-15 I/O16-23 I/O24-31
April 2001 Rev. 4
1
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WF512K32-XXX5
FIG. 2
PIN CONFIGURATION FOR WF512K32F-XG4X5 (Low Capacitance) AND WF512K32-XG4TX5 TOP VIEW
NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 A0-18 Data Inputs/Outputs Address Inputs Write Enable Chip Selects Output Enable Power Supply Ground Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8 8 8
WE
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
CS1-4 OE VCC GND NC
BLOCK DIAGRAM
CS 1 WE OE A0-18 512K x 8 512K x 8 CS 2 CS 3 CS 4
512K x 8
512K x 8
8
VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 NC NC NC NC NC
I/O0-7
I/O8-15
I/O16-23
I/O24-31
FIG. 3
PIN CONFIGURATION FOR WF512K32-XG2UX5 AND WF512K32-XG1UX5 TOP VIEW
NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs A0-18
I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
OE A0-18 512K x 8 512K x 8
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A16 CS1 OE CS2 A17 WE2 WE3 WE4 A18 NC NC VCC A11 A12 A13 A14 A15
Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
WE1-4 CS1-4 OE VCC GND
BLOCK DIAGRAM
WE 1 CS 1 WE 2 CS 2 WE 3 CS 3 WE 4 CS 4
512K x 8
512K x 8
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
2
WF512K32-XXX5
ABSOLUTE MAXIMUM RATINGS (1)
Parameter Operating Temperature Supply Voltage Range (VCC) Signal voltage range (any pin except A9) (2) Storage Temperature Range Lead Temperature (soldering, 10 seconds) Data Retention (Mil Temp) Endurance - write/erase cycles (Mil Temp) A9 Voltage for sector protect (VID) (3) -55 to +125 -2.0 to +7.0 -2.0 to +7.0 -65 to +150 +300 20 years 100,000 cycles min. -2.0 to +14.0 V Unit C V V C C Parameter OE capacitance WE1-4 capacitance HIP (PGA) CQFP G4T CQFP G2U/G1U CS1-4 capacitance Data I/O capacitance Address input capacitance NOTES: 1. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may overshoot VSS to -2.0 V for periods of up to 20ns. Maximum DC voltage on output and I/O pins is VCC + 0.5V. During voltage transitions, outputs may overshoot to Vcc + 2.0 V for periods of up to 20ns. 3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is +13.5V which may overshoot to 14.0 V for periods up to 20ns.
CAPACITANCE (TA = +25C)
Symbol COE CWE Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 50 15 CCS CI/O CAD VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz 20 20 50 pF pF pF Max 50 Unit pF pF
This parameter is guaranteed by design but not tested.
LOW CAPACITANCE CQFP (TA = +25C)
Parameter OE capacitance CQFP G4 capacitance CS1-4 capacitance Data I/O capacitance Address input capacitance Symbol COE CWE CCS CI/O CAD Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz Max 32 32 15 15 32 Unit pF pF pF pF pF
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Low Voltage Operating Temp. (Mil.) Operating Temp. (Ind.) A9 Voltage for Sector Protect Symbol VCC VIH VIL TA TA VID Min 4.5 2.0 -0.5 -55 -40 11.5 Max 5.5 VCC + 0.5 +0.8 +125 +85 12.5 Unit V V V C C V
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 5.0V, VSS = 0V, TA = -55C to +125C)
Parameter Input Leakage Current Output Leakage Current VCC Active Current for Read (1) VCC Active Current for Program or Erase (2) VCC Standby Current VCC Static Current Output Low Voltage Output High Voltage Low VCC Lock-Out Voltage Symbol ILI ILOx32 ICC1 ICC2 ICC4 ICC3 VOL VOH1 VLKO Conditions VCC = 5.5, VIN = GND or VCC VCC = 5.5, VIN = GND or VCC CS = VIL, OE = VIH, f = 5MHz CS = VIL, OE = VIH VCC = 5.5, CS = VIH, f = 5MHz VCC = 5.5, CS = VIH IOL = 8.0 mA, VCC = 4.5 IOH = 2.5 mA, VCC = 4.5 0.85
X
Min
Max 10 10 190 240 6.5 0.6 0.45 VCC 4.2
Unit A A mA mA mA mA V V V
3.2
DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V NOTES: 1. The ICC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz). The frequency component typically is less than 2 mA/MHz, with OE at VIH. 2. ICC active while Embedded Algorithm (program or erase) is in progress.
3
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WF512K32-XXX5
AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 5.0V, VSS = 0V, TA = -55C to +125C)
Parameter Write Cycle Time Write Enable Setup Time Chip Select Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Chip Select Pulse Width High Sector Erase Time (2) Read Recovery Time Chip Programming Time Chip Erase Time (3) NOTES: 1. Typical value for tWHWH1 is 7s. 2. Typical value for tWHWH2 is 1sec. 3. Typical value for Chip Erase Time is 8sec. Symbol Min tAVAV tWLEL tELEH tAVEL tDVEH tEHDX tELAX tEHEL tWHWH2 tGHEL 0 11 64 tWC tWS tCP tAS tDS tDH tAH tCPH 60 0 40 0 40 0 40 20 300 15 0 11 64 -60 Max Min 70 0 45 0 45 0 45 20 300 15 0 11 64 -70 Max Min 90 0 45 0 45 0 45 20 300 15 0 11 64 -90 Max Min 120 0 50 0 50 0 50 20 300 15 0 11 64 -120 Max -150 Min 150 0 50 0 50 0 50 20 300 15 Max ns ns ns ns ns ns ns ns s sec ns sec sec Unit
Duration of Byte Programming Operation (1) tWHWH1
FIG. 4
AC TEST CIRCUIT
Current Source I OL
AC TEST CONDITIONS
Parameter Input Pulse Levels Input Rise and Fall Input and Output Reference Level
D.U.T. VZ
Typ VIL = 0, VIH = 3.0 5 1.5 1.5
Unit V ns V V
1.5V
Output Timing Reference Level
C eff = 50 pf
(Bipolar Supply)
I OH Current Source
NOTES: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 . VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance.
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
4
WF512K32-XXX5
AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED (VCC = 5.0V, TA = -55C to +125C)
Parameter Write Cycle Time Chip Select Setup Time Write Enable Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Write Enable Pulse Width High Duration of Byte Programming Operation (1) Sector Erase Time (2) Read Recovery Time before Write VCC Set-up Time Chip Programming Time Output Enable Setup Time Output Enable Hold Time (4) Chip Erase Time (3) NOTES: 1. Typical value for tWHWH1 is 7s. 2. Typical value for tWHWH2 is 1sec. 3. Typical value for Chip Erase Time is 8sec. 4. For Toggle and Data Polling. tOES tOEH 0 10 64 Symbol Min tAVAV tELWL tWLWH tAVWH tDVWH tWHDX tWHAX tWHWL tWHWH1 tWHWH2 tGHWL tVCS 0 50 11 0 10 64 tWC tCS tWP tAS tDS tDH tAH tWPH 60 0 40 0 40 0 40 20 300 15 0 50 11 0 10 64 -60 Max Min 70 0 45 0 45 0 45 20 300 15 0 50 11 0 10 64 -70 Max Min 90 0 45 0 45 0 45 20 300 15 0 50 11 0 10 64 -90 Max -120 Min 120 0 50 0 50 0 50 20 300 15 0 50 11 Max -150 Min 0 50 0 50 0 50 20 300 15 Max Unit
WF512K32-XXX5 150 ns
ns ns ns ns ns ns ns s sec ns s sec ns ns sec
AC CHARACTERISTICS - READ ONLY OPERATIONS (VCC = 5.0V, TA = -55C to +125C)
Parameter Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Select to Output High Z (1) Output Enable High to Output High Z (1) Output Hold from Address, CS or OE Change, whichever is First 1. Guaranteed by design, but not tested Symbol Min tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX tRC tACC tCE tOE tDF tDF tOH 0 60 60 60 30 20 20 0 -60 Max Min 70 70 70 35 20 20 0 -70 Max Min 90 90 90 35 20 20 0 -90 Max Min 120 120 120 50 30 30 0 -120 Max -150 Min 150 150 150 55 35 35 Max ns ns ns ns ns ns ns Unit
5
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WF512K32-XXX5
FIG. 5
AC WAVEFORMS FOR READ OPERATIONS
tDF
tOH
Addresses Stable
tRC
tOE
tACC
tCE
WE
OE
Addresses
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
6
Outputs
CS
High Z
Output Valid
High Z
WF512K32-XXX5
FIG. 6
WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED
tOH tDF tRC
tOE
PA
Data Polling
tAH
tWHWH1
PA
tAS
tWPH
tDH
5555H
tGHWL
tWC
tWP
tCS
A0H
PD
D7
DOUT
Addresses
WE
OE
CS
tDS
NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to the device (for each chip). 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence.
7
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
5.0 V
Data
tCE
WF512K32-XXX5
FIG. 7
AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS
SA
2AAAH
5555H
2AAAH
5555H
tWPH
5555H
tWP
AAH tDS
tAS
tGHWL
tCS
tDH
55H
tAH
80H
AAH
55H
10H/30H
Addresses
WE
OE
CS
Data
NOTE: 1. SA is the sector address for Sector Erase.
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
8
VCC
tVCS
WF512K32-XXX5
FIG. 8
AC WAVEFORMS FOR DATA POLLING DURING EMBEDDED ALGORITHM OPERATIONS
tDF
tOH
High Z
D7 = Valid Data
D0-D7 Valid Data tWHWH 1 or 2 Data
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
tOE
tCH
tOEH
tCE
WE
OE
CS
9
D0-D6
D7
D0-D6 = Invalid
D7
tOE
WF512K32-XXX5
FIG. 9
ALTERNATE CS CONTROLLED PROGRAMMING OPERATION TIMINGS
PA
Data Polling
tAH
tWHWH1
PA
tAS
tGHEL
tCP
tCPH
tDH A0H
5555H
tWC
tWS
PD WE OE CS tDS
Addresses
D7
DOUT
NOTES: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to the device (for each chip). 4. DOUT is the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence.
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
10
5.0 V
Data
WF512K32-XXX5
PACKAGE 400:
66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) 0.25 (0.010) SQ
PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM
25.4 (1.0) TYP
4.34 (0.171) MAX 3.81 (0.150) 0.13 (0.005) 2.54 (0.100) TYP 1.42 (0.056) 0.13 (0.005) 0.76 (0.030) 0.13 (0.005) 15.24 (0.600) TYP 1.27 (0.050) TYP DIA 0.46 (0.018) 0.05 (0.002) DIA 25.4 (1.0) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
11
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WF512K32-XXX5
PACKAGE 510:
68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) 0.25 (0.010) SQ 22.36 (0.880) 0.25 (0.010) SQ 3.51 (0.140) MAX 0.25 (0.010) 0.10 (0.002)
Pin 1
0.25 (0.010) REF
24.0 (0.946) 0.25 (0.010) 1 / 7 1.01 (0.040) 0.13 (0.005)
R 0.25 (0.010)
0.53 (0.021) 0.18 (0.007)
23.87 (0.940) REF
DETAIL A
1.27 (0.050) TYP 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF SEE DETAIL "A"
0.940" TYP
The White 68 lead G2U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2U has the TCE and lead inspection advantage of the CQFP form.
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 519:
68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U)
25.27 (0.995) 0.13 (0.005) SQ 23.88 (0.940) 0.25 (0.010) SQ 0.25 (0.010) 3.56 (0.140) MAX
0.61 (0.024) 0.15 (0.006)
0.84 (0.033) REF
DETAIL A
1.27 (0.050) 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) REF
SEE DETAIL "A"
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
12
WF512K32-XXX5
PACKAGE 501:
68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4)
39.6 (1.56) 0.38 (0.015) SQ 5.1 (0.200) MAX 1.27 (0.050) 0.1 (0.005)
PIN 1 IDENTIFIER Pin 1
12.7 (0.500) 0.5 (0.020) 4 PLACES
5.1 (0.200) 0.25 (0.010) 4 PLACES
1.27 (0.050) TYP 38 (1.50) TYP 4 PLACES
0.38 (0.015) 0.08 (0.003) 68 PLACES
0.25 (0.010) 0.05 (0.002)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 502:
68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)
39.6 (1.56) 0.38 (0.015) SQ 3.56 (0.140) MAX
PIN 1 IDENTIFIER
Pin 1
12.7 (0.500) 0.5 (0.020) 4 PLACES 5.1 (0.200) 0.25 (0.010) 4 PLACES 0.25 (0.010) 0.05 (0.002)
1.27 (0.050) TYP 38 (1.50) TYP 4 PLACES
0.38 (0.015) 0.08 (0.003) 68 PLACES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
13
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
WF512K32-XXX5
ORDERING INFORMATION W F 512K32 X - XXX X X 5 X
LEAD FINISH: Blank = Gold plated leads A = Solder dip leads VPP PROGRAMMING VOLTAGE 5=5V DEVICE GRADE: M = Military Screened I = Industrial C = Commercial
-55C to +125C -40C to +85C 0C to +70C
PACKAGE TYPE: H1 = 1.075" sq. Ceramic Hex In Line Package, HIP (Package 400*) G2U = 22.4mm Low Profile CQFP (Package 510) G1U = 23.9mm Low Profile CQFP (Package 519) G4 = 40mm Low Capacitance, CQFP (Package 501) G4T = 40mm Low Profile CQFP (Package 502) ACCESS TIME (ns) IMPROVEMENT MARK N = No Connect at pins 21 and 39 in HIP for Upgrade (H1 only)* F = Low Capacitance Device (G4 only) ORGANIZATION, 512K x 32 User configurable as 1M x 16 or 2M x 8 Flash WHITE ELECTRONIC DESIGNS CORP. * Call factory for PGA type (HIP) package options.
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520
14
WF512K32-XXX5
DEVICE TYPE
512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module
SPEED
150ns 120ns 90ns 70ns 150ns 120ns 90ns 70ns 150ns 120ns 90ns 70ns
PACKAGE
66 pin HIP (H1) 1.075" sq. 66 pin HIP (H1) 1.075" sq. 66 pin HIP (H1) 1.075" sq. 66 pin HIP (H1) 1.075" sq. 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead Low Capacitance CQFP (G4) 68 lead Low Capacitance CQFP (G4) 68 lead Low Capacitance CQFP (G4) 68 lead Low Capacitance CQFP (G4) 68 lead CQFP/J (G2U) 68 lead CQFP/J (G2U) 68 lead CQFP/J (G2U) 68 lead CQFP/J (G2U) 68 lead CQFP/J (G1U) 68 lead CQFP/J (G2U) 68 lead CQFP/J (G2U) 68 lead CQFP/J (G2U)
SMD NO.
5962-94612 01HUX 5962-94612 02HUX 5962-94612 03HUX 5962-94612 04HUX 5962-94612 01HTX 5962-94612 02HTX 5962-94612 03HTX 5962-94612 04HTX 5962-94612 01HNX 5962-94612 02HNX 5962-94612 03HNX 5962-94612 04HNX
512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module 512K x 32 Flash Module
150ns 120ns 90ns 70ns 150ns 120ns 90ns 70ns
5962-94612 01HZX 5962-94612 02HZX 5962-94612 03HZX 5962-94612 04HZX 5962-94612 01H9X 5962-94612 02H9X 5962-94612 03H9X 5962-94612 04H9X
15
White Electronic Designs Corporation * Phoenix, AZ * (602) 437-1520

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